**Important RGPV Question**

n** CS-304 Digital Systems**

n**III Sem, CSE**

n**UNIT-1 ****Review of Number System and Number Base Conversions**

**UNIT-2 ****Combinational Logic-Half Adder, Half subtractor, full adder, full subtractor**

**UNIT-3 ****Sequential Logic-Flip-Flops, D, T, S-R, J-K Master-Slave, Racing Condition, Edge & Level Triggered Circuits**

**UNIT-4 ****Introduction to A/D & D/A Converters & their Types ,Sample and hold circuits, Voltage to frequency & frequency to voltage Conversion.**

**UNIT-5 ****Introduction to digital communication, Nyquist sampling theorem, Time Division Multiplexing**

nn**UNIT 1**

Table of Contents

Toggle**REVIEW OF NUMBER SYSTEMS **

n**AND **

n**NUMBER BASE CONVERSIONS**

n**Q.1)** Given the following Boolean function: F(W,X,Y,Z) = WX'(Y’ + Z’) + X’.Zβ.(Wβ Y) where represents the XNOR operation, determine the simplified (minimal) SOP expression for F using boolean algebra and Implement the given function using NOR-NOR logic.

**(RGPV Nov 2022)**

**Q.2)** Draw a schematic for a minimal circuit that uses only NOR gates that performs the two’s complement operation on a four bit input value. Let the input be A3:0 and the output be B3:0.

**(RGPV Nov 2022)**

**Q.3) **Simplify the Boolean function F together with the don’t-care conditions d in following forms:

i) sum-of-products

nii) product-of-sums

nF(w, x, y, z)= Ξ£ (0, 1, 2, 3, 7, 8, 10)

nd(w, x, y, z) = Ξ£ (5, 6, 11, 15)

n**(RGPV Dec 2020)**

**Q.4) **Give a Boolean expression that corresponds to this logic circuit. Develop a truth table for the circuit, showing columns for atleast the output of each 2-input gate. You should invent new variable names for these intermediate outputs.

**(RGPV Dec 2020)**

**Q.5) **Differentiate between analog and digital circuits.

**(RGPV Nov 2018)**

**Q.6) **Convert the following- (i) (48.625)10 =(); (ii) Divide (IEC87)16 by (A5)16 .

**(RGPV June 2014)**

**Q.7) ** Convert the Following- (1) Decimal 225.225 to binary, octal and hexadecimal.

(ii) Binary 11010111.110 to decimal, octal and hexadecimal.

n**(RGPV June 2017)**

**Q.8) **Convert (412)10 to (i) Binary (ii)Octal

(iii) Hexadecimal.

n**(RGPV Dec 2017)**

**Q.9) **Convert the number (210.25)10 to base 2, 8.

**(RGPV June 2015)**

**Q.10) **Convert (41.6875)10 to (i) Binary (ii) Octal (iii) Hexadecimal.

**(RGPV May 2018)**

**Q.11) **Convert the following β

(i) (1111)2= ( )10

n(ii) (10010.1011)2= ( )10

n(iii) (23)10 = ( )2

n(iv) (5.5)10 =( )2

n(v) (47.6)10 = ( )2

n**(RGPV Nov 2018)**

**Q.12) **Do as directed-

(i) (56)16 = (?)10

n(ii) (32)10 = (?)2

n(iii) Bubbled OR gate is also calledβ¦β¦β¦

n**(RGPV Dec 2016)**

**Q.13) ** Justify the following statements with examples – (i) Excess-3 code is self complementary code.

(ii) Gray code is a reflected code.

n**(RGPV May 2018)**

**Q.14) **Write briefly about error detecting and error correcting codes.

**(RGPV Dec 2014)**

**Q.15) **Define NAND and NOR gates and give their truth tables. Write down the boolean expressions for the output of each gate.

**(RGPV Nov 2018)**

**Q.16) **What do you understand by universal gate? Design all logic gates using universal gates.

**(RGPV June 2009)**

**Or**

What is universal gate?

n**(RGPV June 2014)**

**Or**

What are universal gates? Explain with example.

n**(RGPV Dec 2014)**

**Or**

What are universal gates? Why are they called so?

n**(RGPV Dec 2015)**

**Or**

Why NAND gate is known as universal gate?

n**(RGPV Dec 2016)**

**Or**

What is universal gate? Implement AND, OR and NOT gates using NAND gates and NOR gates.

n**(RGPV Dec 2017)**

**Q.17)**Implement the function F = A(B+ CD) + BC’ using NOR gate.

**(RGPV June 2017)**

**Q.18) **State and prove basic laws of Boolean algebra.

**(RGPV Dec 2013)**

**Q.19) **Write five theorem of Boolean algebra and simplify F (A+B)’ (A+B).

**(RGPV May 2018)**

**Q. 20) **What is Boolean algebra write any three theorems of Boolean algebra?

**(RGPV Dec 2017) **

**Q. 21) **State the distributive property of Boolean algebra.

**(RGPV Dec 2016)**

**Q. 22) **Simplify the following Boolean function to minimum numbers of literals β

(i) zx+zx’y (ii) xy+xy’ (iii) y(wz’+wz) + xy.

n**(RGPV June 2017)**

**Q. 23) **Simplify the following Boolean function with K-map- F(w, x, y, z) = (0, 1, 2, 4, 5, 6, 8, 9, 12, 13, 14).

**(RGPV June 2010, 2011, 2014)**

**Or**

Simplify the Boolean function using K-map- F(A, B, C, D) = E(0, 1, 2, 4, 5, 6, 8, 9, 12,13, 14)

n**(RGPV Dec 2017)**

**Q. 24) **Simplify the Boolean function with don’t care conditions and implement it with NAND gates- F(w, x, y, z) = E (1, 3, 7, 11, 15) d (w, x, y, z) = (0, 2, 5)

**(RGPV May 2018)**

**Q. 25) **Simplify the Boolean function

F-B’C’D’ + BCD’+ ABCD’ and the don’t care condition d=B’CD’+A’BC’D.

n**(RGPV June 2017)**

**Q. 26) **Explain Hamming and block codes.

**(RGPV June 2011)**

**UNIT 2**

**COMBINATIONAL LOGIC-HALF ADDER, **

n**HALF SUBTRACTOR, FULL ADDER, FULL SUBTRACTOR**

n**Q.1) **What is decoder? Explain BCD to decimal decoder.

**(RGPV June 2020)**

**Q.2) **Design a combinational circuit to convert the binary input ABCD to gray code.

**(RGPV June 2020)**

**Q.3) **Design the binary to octal Decoder and explain its working using block diagram.

**(RGPV Dec 2020)**

**Q.4) **Design Half adder using NAND gates. Also Draw the diagram?

**(RGPV Dec 2020)**

**Q.5) **Draw the truth table and logic diagram of full adder.

**(RGPV Dec 2015)**

Or

nDesign and draw a full adder circuits.

n**(RGPV Dec 2017)**

**Q.6) **Implement a full adder circuit with a decoder and two OR gates.

**(RGPV June 2014)**

**Or**

Implement a full adder circuit with a (3 to 8 lines) decoder and two OR gates.

n**(RGPV Dec 2017)**

**Q.7) **Explain full adder and design a full adder circuit using 3 to 8 decoder and two OR gates.

**(RGPV Dec 2016)**

**Q.8) **Design a full subtractor circuit using decoder and OR gates.

**(RGPV Dec 2015)**

**Q.9) **Design a full subtractor using logic gates.

**(RGPV Dec 2014)**

**Q.10) **Explain half subtractor circuit.

**(RGPV Dec 2013)**

**Q.11) **Design a full adder using minimum logic gates and also discuss he working of parallel adder.

**(RGPV Dec 2012)**

**Q.12) **Draw the logic diagram of look-ahead carry generator and explain Fits working.

**(RGPV Dec 2008, 2015)**

**Or**

Explain the operation of look-ahead carry generator.

n**(RGPV June 2007, 2008, 2010)**

**Or**

Discuss/Explain the working of look ahead carry generator.

n**(RGPV Dec 2012, June 2015)**

**Or**

What is look ahead carry generator? Explain with logic diagram.

n**(RGPV June 2014)**

**Or**

Design and explain the working of look ahead carry generator.

n**(RGPV Dec 2014)**

**Or**

Explain look ahead carry generator.

n**(RGPV Dec 2016)**

**Q.13) **Explain/Design BCD adders.

**(RGPV June 2008, 2012, Dec 2013)**

**Or**

Design and explain the working of 4-bit BCD adder.

n**(RGPV Feb 2010)**

**Or**

Design a BCD adder and also give the rules of BCD addition.

n**(RGPV June 2010)**

**Or**

Design a BCD adder using logic gates.

n**(RGPV Dec 2012)**

**Or**

Design and explain the working of BCD adder.

n**(RGPV Dec 2014)**

**Or**

Draw the logic diagram of BCD adder and explain its working.

n**(RGPV June 2007, Dec 2015)**

**Or**

Write short note on BCD adders.

n**(RGPV Dec 2017)**

**Q.14) **Draw and explain a 4-bit magnitude comparator.

**(RGPV June 2014)**

**Q.15) **Implement the following Boolean function using 4:1 multiplexer using A and B variables to the selection lines β

F(A, B, C) = Ξ£m(1, 4, 5, 7).

n**(RGPV Dec 2015)**

**Q.16) **Design a BCD to excess-3 code converter.

**(RGPV Dec 2015, May 2018)**

**UNIT 3**

**SEQUENTIAL LOGIC-FLIP-FLOPS, D, T, S-R, J-K MASTER- SLAVE, RACING CONDITION, EDGE & LEVEL TRIGGERED CIRCUITS**

n**Q.1) **What is a Shift Register? Draw and explain shift Left- Right shift register.

**(RGPV Dec 2020)**

**Q.2) **Explain the race condition in S-R flip flop. Also explain how it is removed in J-K flip flop.

**(RGPV Dec 2020)**

**Q.3) **How a multiplexer can be used as ROM? Explain in brief.

**(RGPV Dec 2020)**

**Q.4) **Design a sequential circuit using T flip-flop for the following state table.

Assume any suitable assumptions for state assignment.

n**(RGPV Nov 2022)**

**Q.5) **Design a synchronous counter to count in the random sequence 0, 2, 4, 5, 7.0, 2, 4, 5, 7… using D flip-flop.

**(RGPV Nov 2022)**

**Q.6) **Explain the concept of working and applications of following memories-

i) ROM

nii) PLA

niii) DRAM

niv) FLASHRAM

n**(RGPV Nov 2022)**

**Q.7) **Given the network of Fig., determine the functions f2 and f3 if f1 = xz+x’zβ and the overall transmission function is to be

f(w, x,y,z)= Ξ£Β (0,3,6,10,11,12)

n**(RGPV Nov 2022)**

**Q.8) **Each of the following functions actually represents a set of four functions, corresponding to the possible assignments of the don’t-care terms.

F1 (w,x,y,z)= Ξ£Β (1,3,5,6,9,10)+ (11,12)

nF2(w,x,y,z)= Ξ£Β (0,3,4,5,8,9)+ (6,7)

ni) Find f3-f1.f2. How many functions does f3 represent?

nii) Find f4= f1 +f2. How many functions does f4 represent?

n**(RGPV Nov 2022)**

**Q.9) **Explain synchronous and Asynchronous counter.

**(RGPV June 2020)**

**Q.10) **What is Flip-Flop? Explain Master Slave J-K flip-flop.

**(RGPV June 2020)**

**Q.11) **Differentiate static and dynamic RAM.

**(RGPV Nov 2019)**

**Q.12) **Write short note on flash RAM.

**(RGPV Nov 2018, May 2019)**

**Q.13) **What are sequential circuits? What is the main difference between the combinational circuits and sequential circuits?

**(RGPV Nov 2018)**

**Q.14) **What is a flip-flop? Explain the principle of operation of R-S flip-flop with truth table.

**(RGPV Nov 2018)**

**Or**

What is a lip-flop? Explain with a suitable example.

n**(RGPV Dec 2017)**

**Q.15) **What is a shift register? Explain.

**(RGPV June 2010, Dec 2017)**

**Or**

Discuss the shift registers.

n**(RGPV June 2011)**

**Q.16) **Design a synchronous BCD counter with JK flip-flops.

**(RGPV Dec 2016)**

**Q.17) **Design a MOD-6 counter using J-K flip flops.

**(RGPV Dec 2012)**

**Q.18) **Design a MOD-12 binary counter using J-K flip-flop.

**(RGPV June 2015)**

**Q.19) **Find the MOD number of counter in fig Determine its counting sequence. Draw the state diagram. Find the frequency at output QD if input frequency is 7 kHz.

**(RGPV June 2014)**

**Q.20) **Give a brief introduction of a semiconductor memories.

**(RGPV Dec 2011)**

**Or**

Give a comparison of various semiconductor memories.

n**(RGPV June 2014)**

**Q.21) **State and differentiate between ROM, PROM. EPROM and EEPROM.

**(RGPV Dec 2014)**

**Q.22) **Write a short note on PLA.

**(RGPV Dec 2010, June 2012, May 2018, 2019)**

**Or**

Explain PLAS.

n**(RGPV Dec 2013)**

**Q.23) **What is RAM? Distinguish between SRAM and DRAM. What is PLA?

**(RGPV Dec 2015)**

**Q.24) **Design a combinational circuit using ROM. The circuit accepts a 3-bit number and generates an output binary number equal to the square of the input number.

**(RGPV June 2014)**

**Or **

Derive a PLA program table for a combinational circuit that squares a 3-bit number.

n**(RGPV June 2017)**

**Q.25) **A combinational logic circuit is defined by the functions – F1= Ξ£(3 , 5, 6, 7) and Fβ = Ξ£(0, 2, 4, 7). Implement the circuit with a PLA having three inputs, four product terms and two outputs.

**(RGPV Dec 2016)**

n

**UNIT 4**

**INTRODUCTION TO A/D & D/A CONVERTERS & THEIR TYPES, SAMPLE AND HOLD CIRCUITS, VOLTAGE TO FREQUENCY & FREQUENCY TO VOLTAGE CONVERSION**

n**Q.1) **Write notes on the following

i) A/D and D/A convertors

nii) CMOS Logic.

n**(RGPV Nov 2022)**

**Q.2) **How is interfacing of TTL to MOS achieved?

**(RGPV Dec 2020)**

**Q.3) **Describe the application of Monostable multivibrator?

**(RGPV Dec 2020)**

**Q.4) **Implement the following circuit using CMOS logic

i) Y=A.B

nii) Y=A+B

n**(RGPV June 2020)**

**Q.5) **With a neat diagram, explain the operation of 8 bit successive approximation ADC.

**(RGPV June 2020)**

**Q.6) **Drew and explain the working of A/D converter.

**(RGPV Nov 2019)**

**Or**

With the help of circuit diagram explain the A to D converter.

n**(RGPV June 2010, 2012)**

**Or**

Explain A/D converter and its working.

n**(RGPV Dec 2013)**

**Or**

Explain analog to digital converter.

n**(RGPV Dec 2016)**

**Q.7) **What is the need for A/D converter?

**(RGPV Dec 2014)**

**Or**

What is the need of analog to digital conversion?

n**(RGPV Dec 2015)**

**Q.8) **What are the applications of analog to digital converter?

**(RGPV June 2015)**

**Q.9) **Explain flash A/D converter with circuit diagram and parameters.

**(RGPV June 2011)**

**Q.10) **Discuss 3-bit analog to digital flash type converter.

**(RGPV May 2019)**

**Q.11) **Explain with the help of block diagram any one type of analog to digital converter.

**(RGPV Dec 2012)**

**Or**

With a neat diagram explain successive approximation type A/D converter in detail.

n**(RGPV Dec. 2010, 2014)**

**Or**

Explain successive approximation techniques for analog to digital conversion.

n**(RGPV Feb 2010, June 2015)**

**Or**

Explain any one type of analog to digital converter in detail.

n**(RGPV May 2018)**

**Q.12) **Why analog to digital converters is needed? Explain any one digital converters.

**(RGPV Dec 2017)**

**Q.13) **Enlist the various types of analog to digital (A/D) converter and explain any one of them with neat sketch.

**(RGPV Dec 2015)**

**Q.14) **State maximum conversion time and average conversion time.

**(RGPV Dec 2013)**

**Q.15) **Distinguish single slope and double slope A/D converter.

**(RGPV Dec 2014)**

**Q.16) **What is a bipolar D/A converter?

**(RGPV June 2014)**

**Q.17) **Explain a 4 bit R-2R ladder type D/A converter in detail.

**(RGPV Dec 2008, 2014)**

**Or **

Explain the operation of R-2R ladder type digital to analog (D/A) converter with a neat sketch.

n**(RGPV Dec 2015)**

**Q.18) **How can we describe the resolution of a digital to analog converter?

**(RGPV June 2015)**

**Q.19) **Explain the transfer characteristics and various performance parameters of DAC.

**(RGPV June 2015)**

**Q.20) **Discuss about the sample and hold circuits.

**(RGPV June 2009, Nov 2018)**

**Or**

Write short note on sample and hold circuits.

n**(RGPV Dec 2010, 2016, June 2017)**

**Or**

Discuss about sample and hold circuits in A/D converter.

n**(RGPV June 2011)**

**Or**

Explain the principle working of sample and hold circuits.

n**(RGPV Dec 2012)**

**Or**

Draw the circuit diagram of sample and hold circuit and explain its working.

n**(RGPV Dec 2015)**

**Or**

Explain sample and hold circuit.

n**(RGPV May 2019)**

**Q.21) **With the help of circuit diagram explain the V-F converter.

**(RGPV June 2012)**

**Or**

Explain the principle working of V-F converter.

n**(RGPV Dec 2012)**

**Or**

With the help of circuit diagram explain the working of V-F converters.

n**(RGPV Dec 2014)**

**Or**

Explain voltage to frequency converter with the help of block diagram and waveforms.

n**(RGPV Dec 2015, June 2017, May 2018)**

**Or**

Write a short note on V-F converters.

n**(RGPV June 2015)**

**Q.22) **Fig shows a computer control of motor speed. It can change motor speed from 0 to 1500 r.p.m. Find the number of bits of the computer so that it can control the speed within 1 r.p.m. of required speed.

**(RGPV June 2014)**

**Q.23) **Draw and explain the working of bistable multivibrator.

**(RGPV Dec 2005, June 2009, Nov 2019)**Β

**Or**

Describe bistable multivibrator with diagram and working principle.

n**(RGPV June 2011)**

**Q.24) **Explain the terms-monostable, bistable and astable multivibrator.

**(RGPV Dec 2015)**

**Q.25) **Explain monostable multivibrator and write its applications.

**(RGPV June 2010, Dec 2010, 2017)**

**Or**

With the help of timing diagram explain the working of monostable multivibrator.

n**(RGPV June 2012)**

**Or**

With the help of circuit diagram and timing waveforms explain the working of monostable multivibrator.

n**(RGPV Dec 2014)**

**Or**

Explain the operation of monostable multivibrator with the help of waveforms.

n**(RGPV June 2015)**

**Or**

Draw and explain the working of monostable multivibrator.

n**(RGPV May 2018)**

**Or**

Draw and explain monostable multivibrator.

n**(RGPV May 2019)**

**Q.26) **Distinguish between monostable and astable multivibrator.

**(RGPV June 2017)**

**Q.27) **Draw and explain the working of Schmitt trigger.

**(RGPV Nov 2019)**

**Or**

Discuss Schmitt trigger circuits.

n**(RGPV June 2009, Dec 2013)**

**Or**

Write short note on Schmitt trigger

n**(RGPV June 2010, 2012)**

**Or**

Draw a Schmitt trigger circuit and explain with waveforms.

n**(RGPV, Nov./Dec. 2007, June 2015)**

**Or**

With the help of circuit diagram explain the working of Schmitt trigger.

n**(RGPV Dec 2012, 2014)**

**Or**

Draw the circuit diagram of Schmitt trigger and explain its working.

n**(RGPV Dec 2015)**

**Or**

What is Schmitt trigger circuit?

n**(RGPV June 2014)**

**Or**

Write short note on Schmitt trigger circuits.

n**(RGPV Dec 2017)**

**Q.28) **What do you understand by logic families?

**(RGPV June 2015)**

**Q.29) **Write characteristics of digital logic families.

**(RGPV Dec 2015)**

**Q.30) **Draw and explain DTL circuit. Enlist its advantages and disadvantages.

**(RGPV June 2017)**

**UNIT 5 **

**INTRODUCTION TO DIGITAL COMMUNICATION,**

n** NYQUIST SAMPLING THEOREM, **

n**TIME DIVISION MULTIPLEXING**

n**Q.1) **Write notes on the following

i) A/D and D/A convertors

nii) Shannon’s theorem for channel capacity

niii) Nyquist sampling theorem.Β Β Β Β Β Β

n**(RGPV Nov 2022)**

**Q.2) **Describe 2-bit simultaneous A/D Converter.

**Β (RGPV Dec 2020)**

**Q.3) **Explain the procedure of Pulse code modulation with neat diagram?Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β

**(RGPV Dec 2020)**

**Q.4) **What are the advantages of TDM over FDM? Define synchronous TDM?Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β

**(RGPV Dec 2020)**

**Q.5) **Compare the BPSK and BFSK modulation schemes.

**Β (RGPV Dec 2020)**

**Q.6) **Write short note on sampling theorem.

**(RGPV Dec 2008, Nov 2018)**

**Q.7) **Write short note on Nyquist sampling theorem.Β

**(RGPV Nov 2019)**

**Q.8) **Explain time division multiplexing.

**(RGPV May 2019)**

**Q.9) **Draw block diagram of PCM system and explain it. ** **

**(RGPV Nov 2019)**

**Q.10) **Write short note on quantization error. Β Β Β Β Β Β

** (RGPV Nov 2018)**

**Q.11) **What is quantization error? Explain sampling theorem.Β

**(RGPV May 2019)**

**Q.12) **Explain quantization error.Β Β Β Β Β Β Β Β Β Β Β **Β **

** (RGPV June 2014)**

**Q.13) **Explain the terms sampling, quantization and quantization error.

**Β (RGPV Nov 2019)**

**Q.14) **Write short note on BFSK modulation.

**(RGPV Nov 2018)**

**Or**

** **Explain BFSK.Β Β Β Β

**(RGPVΒ May 2019)**

**Q.15) **Explain Shannon’s theorem for channel capacity.

**(RGPV May 2019)**

**Or**

Explain the information capacity theorem for channel coding.

n**Or**

Write short note on Shannon’s theorem for channel capacity.

n**(RGPV Nov 2018)**

Β Β Β Β Β Β Β Β Β Β Β Β Β Β Β

nΒ

n**— Best of Luck for Exam —**