Important RGPV Question

EX-403 (Digital Electronics Logic Design)

IV Sem, EX

UNIT-1 Number Systems & Codes

Q.1 Design 3-bit data even parity generator and checker.

(RGPV Nov 2023) 

Q.2  Simplify following Boolean expressions:

(i) F(A,B,C,D) = ΠΜ(0,1,2,3,4,5,6,7,9,11) Using K-map.

(RGPV Nov 2023) 

Q.3 Minimize the following functions by Tabular method-

F(A,B,C,D) = Σ m(1,3,7,11,15) + Σd (0,2,5)

(RGPV Nov 2023) 

Q.4 Give the general procedure with example for converting a multilevel AND-OR diagram into an all NAND diagram.

(RGPV Nov 2023) 

Q.5 Convert the following codes.

i) (785.B2)16 = (    )10

ii) (1011011.1101)1 = (      )8

iii) (110101.101101)2 = (      )Gray

iv) (751.231)8 = (     )16

(RGPV June 2023) 

Q.6 Use the tabulation procedure to generate the set of prime implicates and to obtain all minimal expression for

F1 = (w,x,y,z) = Σ(1,5,6,12,13,14) + ΣΦ(10,4)

(RGPV June 2023) 

Q.7 Find the minimal SOP expression for the function f(x, y, z) = Σm (0, 2, 3, 5, 6, 7)

(RGPV June 2023) 

Q.8 What do you understand by Subtractor? Explain the working principle of half subtractor using suitable diagram and truth table.

(RGPV June 2023) 

Q.9 Realize the Boolean expression Z = ABC + AD + CD’ using NAND gates only.

(RGPV June 2023) 

Q.10 Explain in detail about Parity generator and checkers.

(RGPV June 2022) 

Q.11 Why NAND and NOR gates are called universal gates? Realize AND, OR with the help of NAND and NOR gates.

(RGPV June 2022) 

Q.12 Convert the following  (i) (1001.0101)2 to Decimal (ii) (137.21)8 to decimal.

(RGPV June 2022) 

Q.13 What is De-Morgan’s theorem? Simplify the given expression using De-Morgan’s theorem.

(RGPV Dec 2020) 

Q.14 What are Exclusive-OR and Exclusive-NOR gates? Explain with truth table and diagram?

(RGPV Dec 2020) 

Q.15 Convert the following:

i) (312.4)4 to decimal

ii) Binary code 10110 to Hexa code

(RGPV Dec 2020) 

Q.16 Design EX-OR gate with the help of NAND gates only.

(RGPV Dec 2020) 

Q.17 Minimize the following function using K-map and realize using logic gates:

F (A, B, C, D) = Σm (1, 5, 7, 13, 15) + d (0, 6, 12, 14)

(RGPV June 2020) 

Q.18 State and prove De-Morgan’s theorem. Also prove the following rules of Boolean algebra:

i) A + A’B = A + B

ii) (A+B) (A+C) = A + BC

(RGPV June 2020) 

Q.19 Do the following conversions:

i) (101110.0101)2 → (     )8

ii) (432A)16 → (     ) 2

iii) (428.10)10 → (   ) 2

(RGPV June 2020) 

Q.20 Using K-map convert the following standard POS expression into a minimum POS expression, standard SOP expression and minimum SOP expression.

(A’+B+C+D) (A+B’+C+D) (A+B+C+D’) (A+B+C’+D’) (A’+B+C+D’) (A+B+C’+D).

(RGPV June 2020) 

Q.21 Write a short notes on Parity Generator

(RGPV June 2023) 

Q.22 Write short notes on  Parity generators and checkers

(RGPV Dec 2020)

UNIT – 2 Combinational Circuits

Q.1 Design Full-Adder using 2-half adder and an OR gate.

(RGPV Nov 2023) 

Q.2 Design 4 input priority encoder using combinational gates.

(RGPV Nov 2023) 

Q.3 For the Function F(A,B,C,D) =  Σm (0,1,3,4,7,8,9,11, 14, 15), define multiplexers implement using

1) 4×1 MUX

ii) 2×1 MUX

(RGPV Nov 2023) 

Q.4 Define decoder. Construct 3×8 decoder using logic gates.

(RGPV June 2023)

Q.5 Write a short notes on:

i) BCD Adder

ii) Priority Encoder

iii) Decoding in Counter

(RGPV June 2023) 

Q.6 What is De-Multiplexer? Design the given expression using 4×1 multiplexer F(A,B) = Ā + B

(RGPV June 2022) 

Q.7 What is half adder? Write its truth table and design the logic circuit.

 (RGPV June 2022) 

Q.8 Define Encoder and design 2-bit magnitude comparator.

(RGPV June 2022) 

Q.9 What is full substractor? Write its truth table and design the logic circuit.

(RGPV Dec 2020) 

Q.10 What is Multiplexer? Design the given expression using 4×1 multiplexer. F (A, B) = AB+AB

(RGPV Dec 2020) 

Q.11 How will you implement full-adder using half-adder? Explain the circuit diagram.

(RGPV June 2020) 

Q.12 Implement the following expression using 8 to 1 multiplexer:

F (A, B, C, D) = Σm (0, 3, 4, 7, 8, 9, 13, 14)

(RGPV June 2020) 

Q.13 Draw and explain the look ahead carry generator.

(RGPV June 2020) 

Q.14 Write short notes on BCD Adder

(RGPV Dec 2020)

 

UNIT – 3 Sequential Logic Circuit 

Q.1 Draw the clocked Master-Slave J-K flip-flop configuration and explain how it removes race-around condition in J-K flip-flops?

(RGPV Nov 2023) 

Q.2 Differentiate between Latch and Flip-Flop. Analyzing the synchronous sequential circuit, where input and output equation are- JA = x, JB = x, KA = B’, KB = A find- Logic diagram, state table, state equation, state diagram.

(RGPV Nov 2023) 

Q.3 Convert the SR F-F to JK F-F .

(RGPV Nov 2023) 

Q.4 Draw a neat circuit diagram of a negative edge triggered JK flip-flop and explain its operation.

(RGPV June 2023) 

Q.5 Prepare the state table and excitation table for the Sequential machine shown below. Use T flip flop.

(RGPV June 2023)

Q.6 Draw a neat circuit diagram of positive edge triggered D flip-flop and explain its operation.

(RGPV June 2023) 

Q.7 What do you mean by flip-flop? Explain with the help of diagrams and tables?

(RGPV June 2022) 

Q.8 What are Latches? Write applications of flip-flop.

(RGPV June 2022) 

Q.9 Convert SR flip-flop to JK flip-flop.

(RGPV June 2022) 

Q.10 What do you mean by Master-Slave Flip-Flop? Explain with the help of diagrams and tables.

(RGPV Dec 2020)

Q.11 Distinguish between Latch and Flip-Flop.

(RGPV Dec 2020) 

Q.12 Explain J-K flip-flop and D-flip-flop.

(RGPV Dec 2020) 

Q.13 What is race around condition? Explain with the help of timing diagram. How is it removed in basic flip-flop circuit? 

(RGPV June 2020) 

Q.14 Design sequence generator using J-K Flip-Flop for the following sequence:

1→3→5→6→7→1.

(RGPV June 2020)

 

UNIT – 4 Registers & Counters 

Q.1 Design a synchronous counter using JK flip-flop for the following input sequences: 0-1-2-4-5-6-0 

(RGPV Nov 2023) 

Q.2 With the help of diagram, explain the operation of universal shift register.

(RGPV Nov 2023) 

Q.3 Explain Moore type of synchronous sequential machine (FSM) using block diagram and suitable example.

(RGPV Nov 2023)

 Q.4 Draw and explain the working of Johnson Counter.

(RGPV June 2023) 

Q.5 Draw a 4-bit Asynchronous UP counter and discuss its characteristics. Draw the waveforms.

(RGPV June 2023) 

Q.6 What are the different types of registers? Explain the Parallel Input Serial Output shift register.

(RGPV June 2023) 

Q.7 What is Asynchronous and Synchronous counter? Give some applications of counter.

(RGPV June 2022) 

Q.8 Write about Ring counter and universal shift registers.

(RGPV June 2022) 

Q.9 Explain BCD counter with the help of diagram.

(RGPV June 2022) 

Q.10 What is UP and DOWN counter? Give some applications of counter?

(RGPV Dec 2020) 

Q.11 Write about Johnson counter and universal shift registers.

(RGPV Dec 2020)

Q.12 Explain different types of registers.

(RGPV Dec 2020) 

Q.13 Explain the difference between asynchronous and synchronous counter. How lockout condition in counter is avoided?

(RGPV June 2020) 

Q.14 Explain with neat diagram working of serial- in serial-out 4-bit shift register. Draw necessary timing diagram.

b) Draw and explain:

i) Johnson Counter

ii) BCD Counter

(RGPV June 2020)

 

UNIT – 5 RAM & ROM 

Q.1 Realize the full adder circuit using the PAL.

(RGPV Nov 2023) 

Q.2 Draw the basic circuit of a ROM cell and explain its working.

(RGPV Nov 2023) 

Q.3 With a neat diagram explain the operation of R-2R DAC.

(RGPV Nov 2023) 

Q.4 What are sequential programmable devices? Draw the sequential programmable logic for a basic microcell logic.

(RGPV June 2023) 

Q.5 Explain the working of successive approximation ADC. Mention the advantages and disadvantages.

(RGPV June 2023) 

Q.6 What is ROM and its types?

(RGPV June 2022) 

Q.7 Explain about combinational PLD’s.

(RGPV June 2022) 

Q.8 Write short notes on the following:-

a) RAM

b) PLA and PAL

(RGPV June 2022) 

Q.9 Explain about PLA and PAL and give difference between them.

(RGPV Dec 2020) 

Q.10 What is RAM?

(RGPV Dec 2020) 

Q.11 Write short notes on Digital to Analog converters

(RGPV Dec 2020) 

Q.12 Draw the basic structure of CPLD. Explain its features in brief.

(RGPV June 2020) 

Q.13 Explain analog to digital conversion using successive approximation.

(RGPV June 2020) 

Q.14 Write short notes on (any two):

a) PAL

b) Master-slave FF

c) ROM

(RGPV June 2020)

 

— Best of Luck for Exam —